[Elphel-support] FPGA CCD Camera Video Compression to send Windows App using Altera Cyclone IV

Adam Gibson c3008353 at uon.edu.au
Sat May 7 17:44:05 PDT 2011


Hi All,

First I want to say that I really happy to see Elphel's open-source
attitude, I find it incredibly refreshing to see someone else's attitude
reflecting mine. It can be very difficult for students if people like Elphel
didn't exist.

I'll put a quick summary first for those with short attention spans like
myself and I'll explain in more detail below.

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__________________
REQUIREMENT SUMMARY
- I need a black box video compression encoder in hardware to run on an
Altera Cyclone IV-E.
- This video will need to be decoded by a windows application created in
Visual Studio.

This perhaps could be done by porting Elphel's work from Xilinx to Altera;
obviously with their permission and assistance.
____________________________________________________________________________
__________________
DETAILS OF MY PREDICAMENT

I'm doing a university project where basically I am to be build a network
camera (from scratch) and send the data to a custom windows user interface
for different processing. I'm already basically learning every skill needed
from scratch and its costing me precious time. The one section I truly need
a black box solution is with Video compression; as it in itself is a team
project on its own; I am but one student with only so much time.

HAS TO BE ALTERA
Now due to both the hardware I already have and my universities support
knowledge is all for Altera FPGAs and not for Xilinx; It has to be Altera.
Simply, I'm already in too deep with Altera and I cannot switch to Xilinx.

WHAT I'VE DONE
I have attached a pdf or my current envisioned scope for my project.
Anything with a red border I'm still at the research stage or haven't
started. Anything without a red border I already have a skeleton system I've
developed, basically a proof of concept. I have a functioning Terasic D5M
5MP camera and some basic code in Verilog, this is a CCD camera and output
Bayer pattern. The output resolution can be controlled by skipping and
binning techniques directly built into the camera.

MY GOALS
What my goal in this perspective is to hopefully get some assistance or a
black box solution so I can achieve some sort of Video compression in
hardware. This compressed video will be sent via TCP/UDP network to a
windows PC with a decoder inside a Visual Studio application. 
When all is said and done I would like to publish my logs, reports, code and
designs all back to the open-source community; as long as this is ok with
anyone who has assisted or plain given me any solutions. Obviously priority
1 is to get the Uni project done and all agreeing priority 2 is to publish
my work so that others do not have to struggle as hard as I am now.

____________________________________________________________________________
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QUESTIONS
1. What recommendations do people have for video compression. Keeping in my
mind that I need this to consume as little of my time as possible (I know a
shocker).
2. If I were to port Elphel's compression (with their express permission),
what Xilinx to Altera problems am I likely to run into?
3. Is there more detailed documentation on the Elphel FPGA design? The
current level I have been able to find is not very helpful with the level
I'm getting down to.
4. Is anyone else working on similar things that would wish to pool our
resources?

Thanks in advance guys for any help you're willing to give, no matter how
small.

Regards,

A. Gibson 
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