[Elphel-support] Image resize doesn't work in 353 - broken HW?

[Andrey Filippov]

2010/10/22 Petri Välisuo <petri.valisuo at uwasa.fi>

> We just received our second Elphel 353 camera. We decided to
> first test that everything works. Apparently there is something
> wrong with the camera, since the image is Ok only with full
> size images. We tried firmware update, but it didn't change
> anything. Test images and full description of the problem
> is in the following web page:
>
> http://ekauppa.techno.uwasa.fi/~petri/tmp/elphel/<http://ekauppa.techno.uwasa.fi/%7Epetri/tmp/elphel/><
> http://ekauppa.techno.uwasa.fi/%7Epetri/tmp/elphel/>
>
> Can you help us to resolve the problem, or do we need to
> send the camera back?
>



If the camera behaves differently from the other one, there probably is some
hardware problem and we'll send your the replacement  camera (or just the
faulty board if you can replace it yourself) - it should not be more
difficult than to replace the sensor front end. The problem itself (camera
works only at full resolution) seems new to me, so it would be nice if you
can troubleshoot the problem more.

As you have additional sensors, you may first try to make sure that problem
stays with the system (main) board, not with the sensor (or the sensor cable
- bad contact there could be a cause of the problem). Even when you enable
FPGATEST=1 the camera still uses the sync signals from the sensor, it just
substitutes the data with a test pattern.

Additionally you may try to change settings of two bits in one of the
control registers and see if anything changes -  (DCR0, 0x4e) - it is
defined in :

http://elphel.cvs.sourceforge.net/viewvc/elphel/elphel353-8.0/os/linux-2.6-tag--devboard-R2_10-4/arch/cris/arch-v32/drivers/elphel/x353.h?view=markup:

340     #define X353DCR0__HACT_REGEN__BITNM 3 // use HACT duration from the
memory channel0 (0 - use one from the sensor)
341     #define X353DCR0__HACT_REGEN__WIDTH 1
...
349     /// RESET_MCONTR may cause infrequent interrupt loss
350     #define X353DCR0__RESET_MCONTR__BITNM 5 // 1 - enable reset memory
controllers (channles 0,1,2) at each frame
351     #define X353DCR0__RESET_MCONTR__WIDTH 1

bit number 3 (0x8) defines the source of the "horizontal active" signal,
when 0 camera uses output from the sensor, when 1 - it just uses the leading
edge from the sensor, the duration is generated internally in the FPGA. The
0x4e register (it is write-only, can not be read back) allows to change
multiple bit groups independently with additional enable bits. So to set
just that bit you need to write 0x18 to 0x4e, to reset - 0x10

Another bit - bit 5 (0x20) resets compressor memory pointer for each frame
if set, you can similarly change it by writing 0x60 (set) or 0x40 (reset) to
0x4e

You can do it through the browser:

http://192.168.0.9/fpga.php?a=0x4e&d=0x10
http://192.168.0.9/fpga.php?a=0x4e&d=0x18
http://192.168.0.9/fpga.php?a=0x4e&d=0x40
http://192.168.0.9/fpga.php?a=0x4e&d=0x60

or just in telnet session

fpcf -w 4e 10 # reset DCR0 bit 3
fpcf -w 4e 18 # set DCR0 bit 3

fpcf -w 4e 40 # reset DCR0 bit5
fpcf -w 4e 60 # set DCR0 bit 5

Andrey
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://support.elphel.com/pipermail/support-list_support.elphel.com/attachments/20101022/90c3d7eb/attachment-0002.html>