[Elphel-support] how to dump code into camera

[Oleg]

Hi,


> I understand that the 10359 has an additional XC3S1200 FPGA that can be
> used for image
> processing routines without modifying the FPGA on the 353 main board. Is
> there a simple
> way to dump a Verilog generated bitstream onto the 10359 FPGA, such as
> putting it into a
> file like /etc/x353.bit?
>

Yes, it's the same - copy x359.bit to /etc/x359.bit and reboot. Verilog for
10359
<http://elphel.cvs.sourceforge.net/viewvc/elphel/elphel353-8.0/fpga/x359/>.

The 10359 is connected between the sensor and the system board: "sensor -
10359 - 10353"
The 10359's input is raw pixel data and so the output needs to "mimic" the
sensor as well - the compression is done on the system board.

Best regards,
Oleg Dzhimiev
Electronics Engineer
phone: +1 801 783 5555 x124
Elphel, Inc.
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