[Elphel-support] Fpga build using ISE 11.1

[Hanno Jaspers]

Hey Andrey,

I'm also a member of the project-group, that already asked you several
questions about the camera and the FPGA.
We had the problem that our university supplied us with the Xilinx ISE
11.1 before we noticed, that the code couldn't be translated with this
new version, only with the older version 10.1.03. I studied the code a
little, and changed it only a little at the part you mentioned in the
mailing-list (the end of quantizator353.v). With the following code,
everything can be synthesized, translated and mapped with the ISE 11.1
and also 12.1:

//synthesis attribute INIT of i_z0  is 32'hC67319CC;
//synthesis attribute INIT of i_z1  is 32'h611A7896;
//synthesis attribute INIT of i_z2  is 32'h6357A260;
//synthesis attribute INIT of i_z3  is 32'h4A040C18;
//synthesis attribute INIT of i_z4  is 32'h8C983060;
//synthesis attribute INIT of i_z5  is 32'hF0E0C080;

Greetings from Dortmund, Germany!
Hanno Jaspers.