[Elphel-support] 10359 data packing and clock tree

[Gladys]

Dear Oleg/Andrey,

As introduced in the website <http://www3.elphel.com/wiki/10359>, The board
10359 could simultaneously acquire images from up to 3 sensors, compress
them and send out one after another, in alternation mode it could combine
frames from 2 sensors into one resulting frame vertically. I have several
questions here.

1 I want to know if we don't use SDRAM to store frame but directly use the
real time data, should we use asynchonous FIFO to get a 1 line delay for
sensor1 then pack it after each line of sensor 2 during the horizontal
blanking time?

2 how does the clock tree function, since there are different pixel clock
from each sensor,  if we send out the pixel data one after another(either
line by line or frame by frame), how to choose the output pixel clock? How
to generate the FIFO clock in this case?

3 When I use asynchonous FIFO to scale the lines, there is clock
latency(about 4 to 5 pixel clock), so the output data are not correct, do I
need to use shift register to delay the pixel data, is there any other
solution?

Thank you for answers!

Kind Regards.


Gladys
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