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<tbody><tr><td cellspacing="0" cellpadding="0" align="LEFT"><b>All Implementation Messages</b></td><td><b>Do. Nov 18 11:16:12 2010</b></td></tr></tbody></table><hr><br><table border="1" cellpadding="0" cellspacing="0"><tbody><tr bgcolor="#dddddd"><td>Program</td><td> </td><td>All Implementation Messages - Errors</td><td>New</td></tr>
<tr><td>map</td><td>ERROR </td><td>Place:1120 - Big block initial
random placer cannot find solution. This is due to design being
overconstrained by user specified or clock region constraints. Try
locking down the big blocks to improve this condition.</td><td> </td></tr>
<tr><td>map</td><td>ERROR </td><td>Place:543 - This design does not
fit into the number of slices available in this device due to the
complexity of the design and/or constraints.
Unplaced instances by type:
MULT18X18SIO 4 (21.1%)
Please evaluate the following:
- If there are user-defined constraints or area groups:
Please look at the "User-defined constraints" section below to
determine
what constraints might be impacting the fitting of this design.
Evaluate if they can be moved, removed or resized to allow for
fitting.
Verify that they do not overlap or conflict with clock region
restrictions.
See the clock region reports in the MAP log file (*map) for more
details
on clock region usage.
- If there is difficulty in placing FFs:
Evaluate the number and configuration of the control sets in your
design.
The following instances are the last set of instances that failed to
place:
0. MULT18X18SIO i_compressor/i_color_proc/i_csconvert18/Mmult_mm1
1. MULT18X18SIO i_compressor/i_color_proc/i_csconvert18/Mmult_mm3
2. MULT18X18SIO i_compressor/i_xdct/i_dct_stage2/Mmult_p2b_all_mult0000
3. MULT18X18SIO i_compressor/i_xdct/i_dct_stage2/Mmult_p1b_all_mult0000
These instances could be impacted by the following constraints
(the line IDs below correspond with the instances above):
Clock Region restrictions
0. MULT18X18SIO i_compressor/i_color_proc/i_csconvert18/Mmult_mm1
driver: GCLK i_dcm333/i_xclk @ BUFGMUX_X3Y9
CLOCKREGION_X1Y0, CLOCKREGION_X1Y1
1. MULT18X18SIO i_compressor/i_color_proc/i_csconvert18/Mmult_mm3
driver: GCLK i_dcm333/i_xclk @ BUFGMUX_X3Y9
CLOCKREGION_X1Y0, CLOCKREGION_X1Y1
2. MULT18X18SIO i_compressor/i_xdct/i_dct_stage2/Mmult_p2b_all_mult0000
driver: GCLK i_dcm333/i_xclk @ BUFGMUX_X3Y9
CLOCKREGION_X1Y0, CLOCKREGION_X1Y1
3. MULT18X18SIO i_compressor/i_xdct/i_dct_stage2/Mmult_p1b_all_mult0000
driver: GCLK i_dcm333/i_xclk @ BUFGMUX_X3Y9
CLOCKREGION_X1Y0, CLOCKREGION_X1Y1</td><td> </td></tr>
<tr><td>map</td><td>ERROR </td><td>Place:120 - There were not enough sites to place all selected components.</td><td>New</td></tr>
<tr><td>map</td><td>ERROR </td><td>Pack:1654 - The timing-driven placement phase encountered an error.</td><td> </td></tr></tbody></table></body></html>