[Elphel-support] Elphel clock phase

Andrey Filippov support-list at support.elphel.com
Wed Dec 14 08:56:38 PST 2011


Hello Woody,

This could be a rather elusive problem we had with the sensor which
unfortunately is not an open design so we can just guess how it operates.
In the current software we work with the sensor in a  slightly different
way so we do not have that problem, but you are using older version.

The problem is that there is some clock divider that selects odd/even
pixels that is seems to be only reset when the sensor is power-cycled, just
resetting it through hardware reset input or the i2c command in not
sufficient.

In the older firmware we adjusted the phase shift between the sensor data
and the FPGA registers that receive it by varying the clock phase to the
sensor and that clock defined the phase of the data. The sensor clock
output is also routed to the FPGA but we do not use it as there are some
conditions when it is not active and some FPGA activity is
sensor-synchronous that I would like it to run even when the sensor output
is inactive. Additionally it ie easier to keep the internal clock jitter
lower and have a deterministic phase shifts between the FPGA clocks and
minimize the total number of the clocks used.

If for some reasons sensor PLL "does not like" the varying clock input it
may skip the clock period and odd/even sequence flips over. Oddly enough it
is separate for the sensor in the test mode and wrong in the normal:  test
pattern colors are OK, but in the normal image green and magenta are wrong
caused by horizontal shift by 1 pixel. I tried different things that seem
to help, but always it was still breaking at some other point, with some of
the sensors, at least.

 So I finally redesigned the FPGA code, so now sensor sees constant phase
clock, internal circuitry also sees the stable clock with the constant
phase shift and only dedicated modules use the variable shift clock to
match that of the sensor output (plus cable delay, in the Eyesis camera we
now use custom cables up to 450mm long). There is a small FIFO between the
input registers (sensor output synchronous) and the internal circuitry
running independently of the sensor. In the 10359 board where we connect 3
sensors we use same modules on each sensor channel, so the memory runs at
the same clock, each sensor receive constant-phase clock and 3 instances of
such module synchronize sensor data with the common clock.

I do not know how you application depends on the particular firmware
version of the camera, maybe you can modify your code to accommodate the
current camera firmware?

Andrey

On Fri, Dec 9, 2011 at 7:31 AM, Douglass, Woodrow <wdouglass at redzone.com>wrote:

> Oleg,
>
> As soon as I replied, problem came back! attached is a test image.
>
> -Woody
>
>
> On Fri, Dec 9, 2011 at 8:50 AM, Douglass, Woodrow <wdouglass at redzone.com>wrote:
>
>> Oleg,
>>
>> Sorry it has taken me so long to reply. The problem seems to have gone
>> away for now. In my experience, it will come back soon, and when it does i
>> will take a test image and send it. I'm sorry for the delay.
>>
>> The cable length we are using is 3 inches (about 75 mm). How long does
>> the 353 support?
>>
>> -Woody
>>
>>
>> On Wed, Dec 7, 2011 at 2:06 AM, Oleg <support-list at support.elphel.com>wrote:
>>
>>> Woodrow,
>>>
>>> What is the cable length? 30mm?
>>> Could you please send an image from the sensor in test mode?
>>> (You can enable test mode through http://cameraip/parsedit.php - find
>>> TESTSENSOR parameter and set it to 0x10008
>>> or
>>> in telnet or ssh session type "fpcf -i2cw16 48a0 41" (switch back "fpcf
>>> -i2cw16 48a0 0") where "48" is sensor's i2c address (shifted by 1 bit to
>>> the right) and "a0" is the test mode register).
>>>
>>> Regards,
>>> Oleg
>>>
>>> On 6 December 2011 12:24, Douglass, Woodrow <wdouglass at redzone.com>wrote:
>>>
>>>> Hello all,
>>>>
>>>> I am trying to adjust the clock phase on my elphel 353 camera. I am
>>>> using the 7.1.5 firmware.
>>>>
>>>> I followed the instructions on this site:
>>>> http://wiki.elphel.com/index.php?title=Adjusting_sensor_clock_phase
>>>>
>>>> It doesn't seem to make a difference, my picture is still purple. I
>>>> have adjusted the 32 bits at 0x201, as well as using P_SENSOR_PHASE (at 74,
>>>> per c313a.h). neither seem to affect my picture...
>>>>
>>>> Do you have any ideas of what i should try next?
>>>>
>>>> Thanks a lot,
>>>> Woody
>>>>
>>>> _______________________________________________
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>>>> Support-list at support.elphel.com
>>>>
>>>> http://support.elphel.com/mailman/listinfo/support-list_support.elphel.com
>>>>
>>>>
>>>
>>
>
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