[Elphel-support] Using the RJ14 port to trigger a camera flash?

[Andrey Filippov]

Hello Peter,

you are right, the current FPGA code does not have this mode, but it should
be rather easy to add it. Currently there is a module that has
variable period trigger generator, variable delay and logic that allows to
route any of the FPGA GPIO pins (including those available on the 10369
connectors). It also routes any of that pins as a source for the sensor
trigger, it is also possible to use the output of the internal trigger
generator bypassing I/Os. That selectable source (any of the pins or
internal) go through the variable delay and set the trigger signal to the
sensor (ARO pin on the circuit diagram), this signal is reset by frame
active signal (VACT), so the module already has it.

 This external flash mode would require multiplexer that would switch to the
input of the variable delay VACT leading edge (vacts in FPGA code). Then you
will need to set exposure time to be equal to frame readout time+flash time
and set variable delay accordingly (more than VACT active time (frame
readout time)  but less than frame period - in that case all the lines will
be exposed by the flash. It is better to use leading edge of VACT and longer
delay than the trailing edge of VACT as for compatibility with different
sensors/modes camera code uses only that leading edge, counting the active
lines internally

Andrey
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