[Elphel-support] FPGA, additional module and interfacing

[Jens Bürger]

Hello again,

we consider adding a additional module to the FPGA-system. Whar would be the easiest way to add a module (maybe at the point where the bypass for raw.php is implemented) and how the communication from the Linux-system towards the FPGA can be done (for controlling reasons)?

Some tips and hints to the source-tree would be much appreciated.

Thanks in advance,
Jens